PBIW Instruction Encoding Technique on the r-Vex Processor: Design and First Results Renan Marks, Felipe Araujo e Ricardo Santos
Ingles
14
Abril de 2012
This work presents the Pattern Based Instruction Word (PBIW) technique for instruction encoding applied to a soft-core VLIW processor named r-VEX. The r-VEX processor is a VLIW soft-core based on the ISA VEX architecture. Besides the experience on applying the encoding technique on the r-VEX processor, we also present some results considering area and power consumption of the processor with the PBIW decoder prototyped in the datapath. Moreover, we show the code size reduction by adopting PBIW.